background image


5. Each node on the network is
synchronized with other nodes
on the order of microseconds.
The
synchronization
is
periodically
updated.
This
guarantees data acquisition by
all nodes at the same time.

6. The sensor node design allows
a variety of external extensions
on stackable boards. Interface
pins include digital IO, analog in
and analog out, SPI, I
2
C, and
serial.


7. The sensors nodes are capable of acquiring
12-bit data with the sampling rate of
200Ksps. External ADCs enable 16-bit
(100Ksps)
or
24-bit
(780sps)
data
acquisition. Ultrasound interface with 5-
20Msps acquisition rate is in the plans.

8. Hardware design of the nodes allows to
perform self-localization of the nodes, that
is establish relative position of each node to
others.
9. Transparent
scheduling
extensions
on
top
of
IEEE802.15.4
protocol
enable
almost 100% efficient bandwidth
utilization
by
eliminating
network collisions and providing
each
node
with
ample
bandwidth. In practical terms,
the scheduling extensions allow
increasing the number of nodes
in a cluster by a factor of 5
without sacrificing performance.
The
same
techniques
significantly
reduce
power
consumption by a sensor node
by
eliminating
most
of
retransmissions due to collisions.
For more information please contact Dr. E.Sazonov (Phone: +1 (315) 268-3914, Email: esazonov@clarkson.edu,
Web: http://www.intelligent-systems.info/wisan.htm)
Front view of a PAN coordinator (shown: graphics LCD,
Bluetooth interface, user buttons)
Rear view of a PAN coordinator (shown: USB interface,
JTAG interfaces, miniSD storage card socket)
WISAN-based wireless accelerometer